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Showing posts from September, 2020

On processor performance in the age of multi-core, part 1.

Processor performance in the age of multi-core: RISC vs. CISC, part 1. Reading Apple’s announcement in the news media and trade press about a plan to transition its next generation Mac computers from Intel-manufactured x64 processors to custom ARM chips prompted me to write a blog entry discussingApple’s strategy in greater depth and, hopefully, with more insight than the coverage of the move that published reports provided. An issue raised by one of the computer industry experts that analyzed the Apple announcement was that it might re-ignite an old debate among CPU hardware engineers with regard to the relative virtues of the CISC vs. RISC approaches to processor design. This seems very unlikely to me, and I will attempt to explain why in this post. Basically, RISC has won the engineering battle, but meanwhile Intel has good reasons to continue to resist any breaking changes in its hardware platform that would cause existing x86 and x64 software to fail. What is actually the most i